This application claims the benefit of Korean Patent Application No. P98-63 372, filed on Dec. 31, 1998, which is hereby incorporated by reference.
1. Field of the Invention
This invention relates to a data transmission apparatus and method for transmitting parallel data and, more particularly, to a liquid crystal display device employing the data transmission apparatus. Although the present invention is applicable to a wide range of devices, it is especially applicable to a computer system employing the data transmission apparatus.
2. Discussion of the Related Art
Generally, the amount of information, such as text information and video information, transmitted over a transmission medium has been increasing as compared with that of audio information. Recently, the amount of video information, in particular, has been even more increasing so as to meet the demand for high quality images. In addition, information is being transmitted at a high speed so that a user can make use of it at an appropriate time. For these reasons, a frequency band to be occupied by the information must be heightened and, simultaneously, the number of lines for transmitting the information must be increased in accordance with the amount of information.
For example, FIG. 1 shows a portable computer employing a liquid crystal display(LCD) where video data is transmitted from a video card 12 within a computer main body 10 to a data driving integrated circuit chip 22, hereinafter referred to as xe2x80x9cD-ICxe2x80x9d, with increased frequency corresponding to a higher resolution mode of an image, i.e., the number of picture elements (or pixels) is larger. More specifically, since a greater number of pixels are included in a liquid crystal panel 24 as an XGA mode or SXGA mode replaces the existing VGA mode, the amount of video data for one line to be transmitted within one horizontal time interval becomes greater. Accordingly, the frequency of video data transmitted from the video card 12 within the computer main body 10 to the D-ICs 22 increases. In accordance with such a frequency increase, an electromagnetic interference (EMI) emerges on a first transmission line 16A and a second transmission line 16B. The first transmission line 16A is for continuously transmitting an 18 bit data for one dot from the video card 12 to an interface 14 in the LCD 20 and the second transmission line 16B is for continuously transmitting an 18 bit data from the interface 14 to the D-ICs 22. For example, the first transmission line 16A extending from the video card 12 to the interface 14 is usually made of a flexible printed circuit film, hereinafter referred to as xe2x80x9cfirst FPC filmxe2x80x9d. The exposed first FPC film generates a large amount of EMI. Also, when the D-ICs 22 are mounted on the FPC film in a TAB-IC type or loaded on the liquid crystal panel 24 in a chip-on-glass (COG) type, the second transmission line 16B connecting the interface 14 to the D-ICs 22 consists of a second FPC film. The exposed second FPC film also generates an EMI.
Output stages of the video card 12 and the interface 14 must be switched into a high-state voltage or a low-state voltage rapidly as the video data rate rises. Accordingly, the video card 12 transmitting data over the first transmission line 16A and the interface 14 transmitting a data over the second transmission line 16B require more power consumption in proportion to a rise in the frequency of the video data. Further, the number of bits of the video data also increases as a gray scale of the picture is enlarged. For example, when each of a red data, a green data and a blue data, consisting of one dot of the liquid crystal display device, has 64 gray scales, the bit number of the video data becomes xe2x80x9c18xe2x80x9d. In this case, each of the first-and second transmission lines 16A and 16B has 18 bit lines as shown in FIG. 1.
FIG. 2 shows a transmission timing of 6 bit red data, as an example, in a video data transmitted from the interface 14 to the D-IC 22 in the conventional liquid crystal display device. With reference to FIG. 2, the red data repeats a conversion from 0 gray scale into 63rd gray scale during T1 to T11 periods of dot clock timing. It is to be noted that a data transition from a high-state xe2x80x9c1xe2x80x9d into a low-state xe2x80x9c0xe2x80x9d in each bit line is made 60 times during 11 periods of dot clock timing. Such a data transition causes an increase in power consumption at each output stage.
On the other hand, if each of red, green and blue data has 256 gray scales by employing a 8 bit D-IC in the liquid crystal display device, then 24 bit lines of video data are required. As the bit number of video data increases, the number of bit lines included in each of the first and second transmission lines 16A and 16B also increases. Due to this, an EMI emerging at the first and second transmission lines 16A and 16B becomes more serious in proportion to the number of bits of the video data. Also, power consumption at the video card 12 and the interface 14 is increased even more.
Accordingly, the present invention is directed to a data transmission system that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.
An object of the present invention is to provide a data transmission apparatus and method that are suitable for minimizing EMI and optimizing power consumption.
Another object of the present invention is to provide a liquid crystal display device that minimizes EMI and optimizes power consumption.
A further object of the present invention is to provide a computer system that minimizes EMI and optimizes power consumption.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, a data transmission apparatus according to an embodiment of the present invention includes a mode controller for receiving a data having a plurality of bits along with a synchronous clock to detect a transition amount of the data every period of the synchronous clock and for generating a mode control signal having a logical value changing in accordance with the detected transition amount; a data transmitter, responsive to the mode control signal, for selectively inverting the data and transmitting the inverted data; and a data receiver, responsive to the mode control signal, for selectively inverting the selectively inverted data from the data transmitter to reconstruct the inverted data into the original data.
In another aspect of the present invention, a data transmission includes the steps of receiving a data having a plurality of bits along with a synchronous clock to detect a transition amount of the data every period of the synchronous clock and generating a mode control signal having a logical value changing in accordance with the detected transition amount; responding to the mode control signal to selectively invert the data and transmitting the inverted data; and responding to the mode control signal to selectively invert the selectively inverted data and to reconstruct the inverted data into the original data.
In another aspect of the present invention, a liquid crystal display device includes a mode controller for receiving video data having a plurality of bits to detect a transition amount between nth video data and (nxe2x88x921)th video data and for generating a mode control signal having a logical value changing in accordance with the detected transition amount, said n being an integer; a data transmitter, responsive to the mode control signal, for selectively inverting the nth video data and transmitting the inverted video data; and a data receiver, responsive to the mode control signal, for selectively inverting the selectively inverted video data from the data transmitter to reconstruct the inverted video data into the original video data.
In another aspect of the present invention, a computer system includes a mode controller for receiving video data having a plurality of bits from a video card to detect a transition amount between nth video data and (nxe2x88x921)th video data and for generating a mode control signal having a logical value changing in accordance with the detected transition amount, said n being an integer; a data transmitter, responsive to the mode control signal, for selectively inverting the nth video data and transmitting the inverted video data; and a data receiver, responsive to the mode control signal, for selectively inverting the selectively inverted video data inputted, via a transmission line, from the data transmitter and for reconstructing the inverted video data into the original video data.
In a further aspect of the present invention, a computer includes a mode controller for receiving video data having a plurality of bits from a video card to detect a transition amount between nth video data and (nxe2x88x921)th video data and for generating a mode control signal having a logical value changing in accordance with the detected transition amount, said n being an integer; a data transmitter, responsive to the mode control signal, for selectively inverting the nth video data and transmitting the inverted video data; and a data receiver, responsive to the mode control signal, for selectively inverting the selectively inverted video data inputted, via a transmission line, from the data transmitter and for reconstructing the inverted video data into the original video data and outputting the reconstructed video data to a data driver.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.